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Subversion Repositories sdcard_mass_storage_controller

[/] [sdcard_mass_storage_controller/] [trunk/] [bench/] [sdc_dma/] [verilog/] - Rev 136

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Rev Log message Author Age Path
136 Updated.
1. SD-model uppdated.
2. Data transaction completion only when BD que is empty
3. Card detect with debounce added to Normal_isr register bit, [1][2]
4. Reset logic change, should be synthesizable in altera and xilinx devices, without need of modifications
tac2 4993d 11h /sdcard_mass_storage_controller/trunk/bench/sdc_dma/verilog/
135 Uppdated Testbench tac2 4993d 12h /sdcard_mass_storage_controller/trunk/bench/sdc_dma/verilog/
131 tac2 5183d 10h /sdcard_mass_storage_controller/trunk/bench/sdc_dma/verilog/
130 tac2 5183d 10h /sdcard_mass_storage_controller/trunk/bench/sdc_dma/verilog/
127 tac2 5183d 13h /sdcard_mass_storage_controller/trunk/bench/sdc_dma/verilog/
125 New Testcase added tac2 5450d 19h /sdcard_mass_storage_controller/trunk/bench/sdc_dma/verilog/
102 tac2 5522d 10h /sdcard_mass_storage_controller/trunk/bench/sdc_dma/verilog/
98 Added read support tac2 5523d 14h /sdcard_mass_storage_controller/trunk/bench/sdc_dma/verilog/
97 tac2 5527d 02h /sdcard_mass_storage_controller/trunk/bench/sdc_dma/verilog/
96 Updated, added support for Data Write and cmd to set card in transfer state...
Card status now updates accordingly to state...
tac2 5527d 03h /sdcard_mass_storage_controller/trunk/bench/sdc_dma/verilog/
82 Leftover from the template used.
Ethernet MAC project
tac2 5528d 02h /sdcard_mass_storage_controller/trunk/bench/sdc_dma/verilog/
81 tac2 5528d 02h /sdcard_mass_storage_controller/trunk/bench/sdc_dma/verilog/
79 Simpel new sdModel.v.
Sipport Init command sequnce
tac2 5528d 02h /sdcard_mass_storage_controller/trunk/bench/verilog/
78 tac2 5528d 02h /sdcard_mass_storage_controller/trunk/bench/verilog/
77 tac2 5528d 02h /sdcard_mass_storage_controller/trunk/bench/verilog/
64 tac2 5532d 00h /sdcard_mass_storage_controller/trunk/bench/verilog/
2 tac2 5550d 15h /sdcard_mass_storage_controller/trunk/bench/verilog/

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