URL https://opencores.org/ocsvn/sdcard_mass_storage_controller/sdcard_mass_storage_controller/trunk

Subversion Repositories sdcard_mass_storage_controller

[/] [sdcard_mass_storage_controller/] [trunk/] [sim/] [rtl_sim/] - Rev 136

Rev	Log message	Author	Age	Path
136	Updated. 1. SD-model uppdated. 2. Data transaction completion only when BD que is empty 3. Card detect with debounce added to Normal_isr register bit, [1][2] 4. Reset logic change, should be synthesizable in altera and xilinx devices, without need of modifications	tac2	4980d 00h	/sdcard_mass_storage_controller/trunk/sim/rtl_sim/
132		tac2	5169d 23h	/sdcard_mass_storage_controller/trunk/sim/rtl_sim/
131		tac2	5169d 23h	/sdcard_mass_storage_controller/trunk/sim/rtl_sim/
130		tac2	5169d 23h	/sdcard_mass_storage_controller/trunk/sim/rtl_sim/
129		tac2	5170d 00h	/sdcard_mass_storage_controller/trunk/sim/rtl_sim/
128		tac2	5170d 02h	/sdcard_mass_storage_controller/trunk/sim/rtl_sim/
127		tac2	5170d 02h	/sdcard_mass_storage_controller/trunk/sim/rtl_sim/
126		tac2	5170d 14h	/sdcard_mass_storage_controller/trunk/sim/rtl_sim/
99		tac2	5510d 02h	/sdcard_mass_storage_controller/trunk/sim/rtl_sim/
84		tac2	5514d 14h	/sdcard_mass_storage_controller/trunk/sim/rtl_sim/
83		tac2	5514d 14h	/sdcard_mass_storage_controller/trunk/sim/rtl_sim/
2		tac2	5537d 03h	/sdcard_mass_storage_controller/trunk/sim/rtl_sim/