OpenCores
URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] [sdhc-sc-core/] [trunk/] [src/] [grpSd/] - Rev 184

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
184 Removed WbSlave shell (refs #69)
Moved verification sources to grpSdVerification (fixes #70)
rkastl 4919d 15h /sdhc-sc-core/trunk/src/grpSd/
183 Removed unneeded wrapper (refs #69)
Sector count increased in TestWbMaster (refs #78)
rkastl 4919d 15h /sdhc-sc-core/trunk/src/grpSd/
182 Fixes #60.

Synchronization logic moved to its own unit.
rkastl 4919d 15h /sdhc-sc-core/trunk/src/grpSd/
181 Refs #60.

Fix synthesis with seperate WbClkDomain.
rkastl 4919d 15h /sdhc-sc-core/trunk/src/grpSd/
180 Moved WbClkDomain to its own unit.
Refs #60.
rkastl 4919d 15h /sdhc-sc-core/trunk/src/grpSd/
178 Fixed regression:
Testbenches did not support synchronous reset.
rkastl 4919d 15h /sdhc-sc-core/trunk/src/grpSd/
177 Split SdTop into SdClkDomain and SdTop. Refs #60. rkastl 4919d 15h /sdhc-sc-core/trunk/src/grpSd/
176 Thesis:
Conclusion

Fixes #53,#61.
rkastl 4919d 15h /sdhc-sc-core/trunk/src/grpSd/
171 Worked on wishbone part of thesis.

Refs #37.
Refs #39.
rkastl 4919d 16h /sdhc-sc-core/trunk/src/grpSd/
170 License rewritten to BSD rkastl 4919d 16h /sdhc-sc-core/trunk/src/grpSd/
169 +sdc file for timing analysis rkastl 4919d 16h /sdhc-sc-core/trunk/src/grpSd/
168 TbdSd synthesis script reaches timing constraints. rkastl 4919d 16h /sdhc-sc-core/trunk/src/grpSd/
167 Read+Modify+Write works on HW

+ Fixed CRC status token (not mentioned in simplified spec)
+ Improved TestWbMaster to RMW
rkastl 4919d 16h /sdhc-sc-core/trunk/src/grpSd/
166 tbTbdSd: fixed rkastl 4919d 16h /sdhc-sc-core/trunk/src/grpSd/
165 Only use synchronous high active reset in SDHC-SC-Core. rkastl 4919d 16h /sdhc-sc-core/trunk/src/grpSd/
164 Headers updated (LGPL, consistent format) rkastl 4919d 16h /sdhc-sc-core/trunk/src/grpSd/
161 Verification:
CardModel: Check CRC on received data
rkastl 4919d 16h /sdhc-sc-core/trunk/src/grpSd/
160 Verification:
Full random read and write single blocks sequence works with
checks.
Checking the CRC in the card model is missing.
Writing at addresses above the card size is missing.
Erasing is missing.
rkastl 4919d 16h /sdhc-sc-core/trunk/src/grpSd/
159 Verification:
Further work: Checking RAM Actions and reading data is still
missing
rkastl 4919d 16h /sdhc-sc-core/trunk/src/grpSd/
158 Verification:
Work on Checking
Functional coverage
rkastl 4919d 16h /sdhc-sc-core/trunk/src/grpSd/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.