URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] [sdhc-sc-core/] [trunk/] [src/] [grpSd/] [pkgSdWb/] [src/] - Rev 170

Rev	Log message	Author	Age	Path
170	License rewritten to BSD	rkastl	4923d 20h	/sdhc-sc-core/trunk/src/grpSd/pkgSdWb/src/
164	Headers updated (LGPL, consistent format)	rkastl	4923d 20h	/sdhc-sc-core/trunk/src/grpSd/pkgSdWb/src/
156	SdVerification: + Split a SdCoreTransaction into multiple WbTransactions: Proof of Concept with a ReadSingleBlock-Transaction + Finish after certain amount of time and present simulation result	rkastl	4923d 20h	/sdhc-sc-core/trunk/src/grpSd/pkgSdWb/src/
126	Read and Write works in simulation, needs verification. Synthesis works the same like before.	rkastl	4923d 20h	/sdhc-sc-core/trunk/src/grpSd/pkgSdWb/src/
123	Write: Must be able to halt SdClk, rest is done.	rkastl	4923d 21h	/sdhc-sc-core/trunk/src/grpSd/pkgSdWb/src/
122	SdController: Initial read support	rkastl	4924d 00h	/sdhc-sc-core/trunk/src/grpSd/pkgSdWb/src/
120	SdWbSlave: ClassicRead and ClassicWrite work	rkastl	4924d 00h	/sdhc-sc-core/trunk/src/grpSd/pkgSdWb/src/
119	SdWb: Synchronization of operation to SdController done, but needs testing.	rkastl	4924d 00h	/sdhc-sc-core/trunk/src/grpSd/pkgSdWb/src/
116	Wishbone interface for sd core started	rkastl	4924d 00h	/sdhc-sc-core/trunk/src/grpSd/pkgSdWb/src/