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[/] [sdhc-sc-core/] [trunk/] [src/] [grpSd/] [unitSdVerificationTestbench/] - Rev 125

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Rev Log message Author Age Path
125 Write works in simulation rkastl 4925d 13h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
124 Write: SdClk is disabled, if no data is available. rkastl 4925d 13h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
123 Write: Must be able to halt SdClk, rest is done. rkastl 4925d 13h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
122 SdController: Initial read support rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
121 SdWbSlave inserted into SdTop. SdController does not use it yet. rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
113 Read with single block works on cards, but not in simulation. SdData.sv
sends data with one "XXXX" cycle right before the crc.
rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
111 Sclk moved to neg. edge -> setup and hold times for fast mode are easier
to reach. (only micro sd does not work in fast mode).
rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
110 All except microsd work in highspeed mode. rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
109 Added a data ram. rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
108 Added a ram to the testbed rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
106 Fixes #29: All cards respond, but they do not all work. rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
105 Changing speed works! refs #33 rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
101 Receiving response to ACMD51 works including data, refs #33. rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
100 SdController: Receiving data after ACMD51, but CRC is wrong rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
94 CmdTimeout (8 Clocks) added, SdData inserted into top, refs #31 rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
89 Fixes #27, R3 uses '1111111' as CRC. rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
88 Timeouts inserted, Sending Card status via Rs232 if changed rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
85 Synthese: TbdSd refactored to enable sharing.
Sim: SdVerificationTestbench to new tcl script ported
SdController: TimeoutGenerator added, refs #27
rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
84 SdController: Refactored rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/
83 SdCmd: Refactored rkastl 4925d 17h /sdhc-sc-core/trunk/src/grpSd/unitSdVerificationTestbench/

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