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[/] [sdhc-sc-core/] [trunk/] [src/] [grpSd/] [unitTbdSd/] - Rev 185

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Rev	Log message	Author	Age	Path
185	Restructuring as source repository: Moved sources out of src subdirectory.	rkastl	4920d 13h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
184	Removed WbSlave shell (refs #69) Moved verification sources to grpSdVerification (fixes #70)	rkastl	4923d 06h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
182	Fixes #60. Synchronization logic moved to its own unit.	rkastl	4923d 06h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
181	Refs #60. Fix synthesis with seperate WbClkDomain.	rkastl	4923d 06h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
178	Fixed regression: Testbenches did not support synchronous reset.	rkastl	4923d 06h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
170	License rewritten to BSD	rkastl	4923d 06h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
169	+sdc file for timing analysis	rkastl	4923d 06h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
168	TbdSd synthesis script reaches timing constraints.	rkastl	4923d 06h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
167	Read+Modify+Write works on HW + Fixed CRC status token (not mentioned in simplified spec) + Improved TestWbMaster to RMW	rkastl	4923d 06h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
166	tbTbdSd: fixed	rkastl	4923d 06h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
165	Only use synchronous high active reset in SDHC-SC-Core.	rkastl	4923d 06h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
164	Headers updated (LGPL, consistent format)	rkastl	4923d 06h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
151	Verification: + redesign: not functional yet	rkastl	4923d 07h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
150	Testbed: + Simulation made possible + Write works - Sometimes the alignment in the block is not right	rkastl	4923d 07h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
148	SdVerification: + CardModel: Execution thread which starts initialization and then receives token and parses them. TbdSd: + Added SdWbSdSynchronization.	rkastl	4923d 07h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
144	Simulation files for tbTbdSd created. tbTbdSd is not done and TestWbMaster seems to be lost.	rkastl	4923d 07h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
136	SDHC: - SdData refactored to use a single counter - TestWbMaster added to TbdSd (not functional yet)	rkastl	4923d 07h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
126	Read and Write works in simulation, needs verification. Synthesis works the same like before.	rkastl	4923d 07h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
122	SdController: Initial read support	rkastl	4923d 10h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/
121	SdWbSlave inserted into SdTop. SdController does not use it yet.	rkastl	4923d 10h	/sdhc-sc-core/trunk/src/grpSd/unitTbdSd/

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[/] [sdhc-sc-core/] [trunk/] [src/] [grpSd/] [unitTbdSd/] - Rev 185

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