URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] [sdhc-sc-core/] [trunk/] [src/] [grpWishbone/] [pkgWishbone/] - Rev 170

Rev	Log message	Author	Age	Path
170	License rewritten to BSD	rkastl	4920d 06h	/sdhc-sc-core/trunk/src/grpWishbone/pkgWishbone/
164	Headers updated (LGPL, consistent format)	rkastl	4920d 06h	/sdhc-sc-core/trunk/src/grpWishbone/pkgWishbone/
23	Wishbone: Package split into a global and a specific one.	rkastl	4920d 11h	/sdhc-sc-core/trunk/src/grpWishbone/pkgWishbone/
22	Wishbone: Processes for statemachine created	rkastl	4920d 11h	/sdhc-sc-core/trunk/src/grpWishbone/pkgWishbone/
21	Wishbone: Control signals into records, unfortunately signals with a width dependend on generics can not be used in records before VHDL2008.	rkastl	4920d 11h	/sdhc-sc-core/trunk/src/grpWishbone/pkgWishbone/
20	Wishbone: Directions added to port, support for synchronous cycle termination added to entity (and therefore new types in the package were created)	rkastl	4920d 11h	/sdhc-sc-core/trunk/src/grpWishbone/pkgWishbone/
18	Wishbone: Slave entity started, Build file generated	rkastl	4920d 11h	/sdhc-sc-core/trunk/src/grpWishbone/pkgWishbone/