URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [verif/] [run/] - Rev 72

Rev	Log message	Author	Age	Path
72	Command Clean up for model-sim mode	dinesha	4157d 17h	/sdr_ctrl/trunk/verif/run/
45	RTL clean up and logic seperation done from sdram bus converter and request generator	dinesha	4656d 16h	/sdr_ctrl/trunk/verif/run/
43	Test bench automation to handle differ write/read burst sequence is supported now	dinesha	4658d 16h	/sdr_ctrl/trunk/verif/run/
33	clean up	dinesha	4661d 10h	/sdr_ctrl/trunk/verif/run/
29	SDRAM top and core related run file list are added into svn	dinesha	4663d 09h	/sdr_ctrl/trunk/verif/run/
19	8 Bit SDRAM Support added	dinesha	4667d 08h	/sdr_ctrl/trunk/verif/run/
5	Run files are updated into SVN	dinesha	4674d 10h	/sdr_ctrl/trunk/verif/run/
2		dinesha	4684d 10h	/sdr_ctrl/trunk/verif/run/