URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] - Rev 28

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
28	added T6502 processor added vga_char_ctrl	jt_eaton	5156d 10h	/socgen/
27	added uart and ps2 host and models added more documentation	jt_eaton	5178d 01h	/socgen/
26	moved install instructions from doc -> tools added scripts to install or32 gnu toolchain and fizzim state tool	jt_eaton	5186d 14h	/socgen/
25	updated for ubuntu 10.4 install	jt_eaton	5187d 05h	/socgen/
24	moved to docs	jt_eaton	5188d 09h	/socgen/
23	fixed typos and ommisions	jt_eaton	5188d 09h	/socgen/
22	added install instructions for ubuntu 10.4	jt_eaton	5188d 10h	/socgen/
21	now use serial_rcvr	jt_eaton	5188d 22h	/socgen/
20	added Nexys2 support expanded docs created tools directory	jt_eaton	5188d 22h	/socgen/
19	added serial_xmit module updated and added docs	jt_eaton	5196d 05h	/socgen/
18	added geda support files and docs	jt_eaton	5201d 03h	/socgen/
17	removed old doc files	jt_eaton	5203d 04h	/socgen/
16	added geda scripts and symbols/sch	jt_eaton	5203d 05h	/socgen/
15	added io_module with ps2 and uart added soc_mouse with uart and mouse interface fixed latch in mrisc	jt_eaton	5209d 08h	/socgen/
14	add web_uploads	jt_eaton	5219d 11h	/socgen/
13	updated for xilinx webpack 11.1	jt_eaton	5227d 01h	/socgen/
12	switched Makefile to use xilinx 11.1 ise removed timescale from synthesis files now use consist timescale header in all sims	jt_eaton	5227d 12h	/socgen/
11	moved bsdl files renamed ucf file	jt_eaton	5233d 08h	/socgen/
10	added impact_bat to generate svf files	jt_eaton	5233d 09h	/socgen/
9	updated build_cmp and cleaned up fpga script added more utility tools	jt_eaton	5235d 10h	/socgen/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories socgen

[/] [socgen/] - Rev 28

Filtering Options