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[/] [socgen/] [trunk/] - Rev 49

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Rev Log message Author Age Path
49 added covered code coverage
added xml descriptors
added soc_Link tool
jt_eaton 5083d 17h /socgen/trunk/
48 added support for covered code checking jt_eaton 5105d 23h /socgen/trunk/
47 removed old variant jt_eaton 5120d 02h /socgen/trunk/
46 removed hard coded component names from design files
define file is always defines.v
top level is always top.v
jt_eaton 5120d 02h /socgen/trunk/
45 added 6502 sims/software and synth jt_eaton 5126d 22h /socgen/trunk/
44 added new parts and sw for 6502 jt_eaton 5127d 01h /socgen/trunk/
43 complete rework of states and sequencer
added interrupts
moved prog space and vectors to F space
jt_eaton 5136d 23h /socgen/trunk/
42 removed old versions that used prog as C space jt_eaton 5137d 00h /socgen/trunk/
41 added kim-1 design and program
now support Nexys2 sdram
jt_eaton 5155d 00h /socgen/trunk/
40 removed test for deleted block jt_eaton 5155d 01h /socgen/trunk/
39 added io_probe to sims
added boot rom into 6502
added T6502_control
jt_eaton 5163d 13h /socgen/trunk/
38 fsm level removed jt_eaton 5163d 13h /socgen/trunk/
37 continued to clean up inst decodes to alu and move datapath out of sequencer
removed latched alu_result, now uses raw
jt_eaton 5172d 20h /socgen/trunk/
36 split out alu_ctrl block
split out alu decode signals
jt_eaton 5173d 14h /socgen/trunk/
35 added T6502 doc jt_eaton 5174d 17h /socgen/trunk/
34 removed BCD mode from T6502
started to convert design to use datapath logic for alu
jt_eaton 5179d 20h /socgen/trunk/
33 removed unused block jt_eaton 5179d 20h /socgen/trunk/
32 renamed to T6502_state_fsm jt_eaton 5180d 03h /socgen/trunk/
31 split T6502_fsm out into smaller blocks jt_eaton 5180d 17h /socgen/trunk/
30 split out fsm code into seperate modules
fixed bugs so that prog_test passes
jt_eaton 5183d 02h /socgen/trunk/

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