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[/] [socgen/] [trunk/] - Rev 74

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Rev Log message Author Age Path
74 split out sw Makefile into projects /bin
split out _cpu into seperate component		 jt_eaton 4991d 18h /socgen/trunk/
73 removed dup png files jt_eaton 4999d 18h /socgen/trunk/
72 split T6502 into components
moved io_module into seperate project
removed liblists
direct loads filelists for sims and coverage
add hier type into xml files to generate verilog		 jt_eaton 4999d 20h /socgen/trunk/
71 ignore anything in work jt_eaton 5006d 12h /socgen/trunk/
70 ignore work jt_eaton 5006d 13h /socgen/trunk/
69 added work dir jt_eaton 5006d 13h /socgen/trunk/
68 moved to seperate components jt_eaton 5009d 12h /socgen/trunk/
67 updated installs jt_eaton 5009d 13h /socgen/trunk/
66 converted sims to use parameters
added msp and 6502 software installs		 jt_eaton 5010d 12h /socgen/trunk/
65 added params.sim to sims
updated install's		 jt_eaton 5015d 13h /socgen/trunk/
64 added support for Fedora 13 jt_eaton 5019d 11h /socgen/trunk/
63 added install config for Ubuntu 10.10 jt_eaton 5019d 18h /socgen/trunk/
62 fixed parameters from `defines jt_eaton 5023d 10h /socgen/trunk/
61 now generate dut files for coverage
removed use of lndir		 jt_eaton 5023d 12h /socgen/trunk/
60 moved alu_logic into seperate component jt_eaton 5023d 23h /socgen/trunk/
59 added filelist.core to syn dirs to customize core jt_eaton 5023d 23h /socgen/trunk/
58 removed old Makefiles jt_eaton 5024d 14h /socgen/trunk/
57 Now generate all filelists from xml files jt_eaton 5024d 14h /socgen/trunk/
56 soc_builder now builds verilog from xml files jt_eaton 5029d 23h /socgen/trunk/
55 removed pre-rout and gates sims jt_eaton 5032d 19h /socgen/trunk/

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