URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [doc/] - Rev 134

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
134	Resynced database socgen now supports elaboration Bad news is that it is now alot slower.	jt_eaton	3329d 23h	/socgen/trunk/doc/
128	major cleanup added toolflows for sim,syn,documentation,linting and verilog added documentation tools	jt_eaton	3963d 20h	/socgen/trunk/doc/
125	Added two new 6502 cores in www.6502.org cleaned up sogen xml files and added module name control	jt_eaton	4176d 15h	/socgen/trunk/doc/
124	beta release candidate 1 changed design.xml name aligned schema with filesystem	jt_eaton	4229d 18h	/socgen/trunk/doc/
120	clean up componentGenerators names and directories sim + lint now synthesis TestBench	jt_eaton	4290d 20h	/socgen/trunk/doc/
119	moved copyright files into /verilog changed cde copyright to apache from gplv3 split out tools into separate subdirectories changed design.xml files to socgen: namespace	jt_eaton	4325d 14h	/socgen/trunk/doc/
115	split or1200_cpu up into all ip-xact components removed dead files	jt_eaton	4467d 20h	/socgen/trunk/doc/
103	added user guide resynced to local repository	jt_eaton	4543d 16h	/socgen/trunk/doc/
99	moved all projects into /projects/opencores.org added build_register added fizzim	jt_eaton	4661d 13h	/socgen/trunk/doc/
94	socgen now supports both sim and syn views now allow each xml file to set its destination	jt_eaton	4807d 14h	/socgen/trunk/doc/
85	moved all synthesis into fpgas lib fixed memory leak in recursive routines	jt_eaton	4880d 11h	/socgen/trunk/doc/
81	morphing xml files to use 1685 removed log directories	jt_eaton	4966d 21h	/socgen/trunk/doc/
80	now generate all sims and syns param and filelists for xml	jt_eaton	4996d 12h	/socgen/trunk/doc/
67	updated installs	jt_eaton	5031d 14h	/socgen/trunk/doc/
65	added params.sim to sims updated install's	jt_eaton	5037d 14h	/socgen/trunk/doc/
56	soc_builder now builds verilog from xml files	jt_eaton	5052d 00h	/socgen/trunk/doc/
54	now set up fpga targets from xml files	jt_eaton	5054d 22h	/socgen/trunk/doc/
49	added covered code coverage added xml descriptors added soc_Link tool	jt_eaton	5057d 15h	/socgen/trunk/doc/
39	added io_probe to sims added boot rom into 6502 added T6502_control	jt_eaton	5137d 11h	/socgen/trunk/doc/
28	added T6502 processor added vga_char_ctrl	jt_eaton	5159d 23h	/socgen/trunk/doc/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories socgen

[/] [socgen/] [trunk/] [doc/] - Rev 134

Filtering Options