URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [doc/] [src/] - Rev 85

Rev	Log message	Author	Age	Path
85	moved all synthesis into fpgas lib fixed memory leak in recursive routines	jt_eaton	4984d 18h	/socgen/trunk/doc/src/
81	morphing xml files to use 1685 removed log directories	jt_eaton	5071d 04h	/socgen/trunk/doc/src/
80	now generate all sims and syns param and filelists for xml	jt_eaton	5100d 19h	/socgen/trunk/doc/src/
67	updated installs	jt_eaton	5135d 22h	/socgen/trunk/doc/src/
65	added params.sim to sims updated install's	jt_eaton	5141d 21h	/socgen/trunk/doc/src/
56	soc_builder now builds verilog from xml files	jt_eaton	5156d 08h	/socgen/trunk/doc/src/
54	now set up fpga targets from xml files	jt_eaton	5159d 05h	/socgen/trunk/doc/src/
49	added covered code coverage added xml descriptors added soc_Link tool	jt_eaton	5161d 23h	/socgen/trunk/doc/src/
39	added io_probe to sims added boot rom into 6502 added T6502_control	jt_eaton	5241d 19h	/socgen/trunk/doc/src/
28	added T6502 processor added vga_char_ctrl	jt_eaton	5264d 07h	/socgen/trunk/doc/src/
27	added uart and ps2 host and models added more documentation	jt_eaton	5285d 21h	/socgen/trunk/doc/src/
20	added Nexys2 support expanded docs created tools directory	jt_eaton	5296d 19h	/socgen/trunk/doc/src/
19	added serial_xmit module updated and added docs	jt_eaton	5304d 01h	/socgen/trunk/doc/src/
2	added starting docs	jt_eaton	5353d 05h	/socgen/trunk/doc/src/