OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [doc/] [src/] - Rev 99

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
99 moved all projects into /projects/opencores.org
added build_register
added fizzim
jt_eaton 4646d 15h /socgen/trunk/doc/src/
94 socgen now supports both sim and syn views
now allow each xml file to set its destination
jt_eaton 4792d 15h /socgen/trunk/doc/src/
85 moved all synthesis into fpgas lib
fixed memory leak in recursive routines
jt_eaton 4865d 12h /socgen/trunk/doc/src/
81 morphing xml files to use 1685
removed log directories
jt_eaton 4951d 22h /socgen/trunk/doc/src/
80 now generate all sims and syns param and filelists for xml jt_eaton 4981d 13h /socgen/trunk/doc/src/
67 updated installs jt_eaton 5016d 16h /socgen/trunk/doc/src/
65 added params.sim to sims
updated install's
jt_eaton 5022d 15h /socgen/trunk/doc/src/
56 soc_builder now builds verilog from xml files jt_eaton 5037d 02h /socgen/trunk/doc/src/
54 now set up fpga targets from xml files jt_eaton 5039d 23h /socgen/trunk/doc/src/
49 added covered code coverage
added xml descriptors
added soc_Link tool
jt_eaton 5042d 17h /socgen/trunk/doc/src/
39 added io_probe to sims
added boot rom into 6502
added T6502_control
jt_eaton 5122d 13h /socgen/trunk/doc/src/
28 added T6502 processor
added vga_char_ctrl
jt_eaton 5145d 01h /socgen/trunk/doc/src/
27 added uart and ps2 host and models
added more documentation
jt_eaton 5166d 15h /socgen/trunk/doc/src/
20 added Nexys2 support
expanded docs
created tools directory
jt_eaton 5177d 13h /socgen/trunk/doc/src/
19 added serial_xmit module
updated and added docs
jt_eaton 5184d 19h /socgen/trunk/doc/src/
2 added starting docs jt_eaton 5233d 23h /socgen/trunk/doc/src/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.