URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [doc/] [src/] [drawing/] [sch/] - Rev 124

Rev	Log message	Author	Age	Path
124	beta release candidate 1 changed design.xml name aligned schema with filesystem	jt_eaton	4200d 12h	/socgen/trunk/doc/src/drawing/sch/
120	clean up componentGenerators names and directories sim + lint now synthesis TestBench	jt_eaton	4261d 14h	/socgen/trunk/doc/src/drawing/sch/
99	moved all projects into /projects/opencores.org added build_register added fizzim	jt_eaton	4632d 07h	/socgen/trunk/doc/src/drawing/sch/
81	morphing xml files to use 1685 removed log directories	jt_eaton	4937d 14h	/socgen/trunk/doc/src/drawing/sch/
65	added params.sim to sims updated install's	jt_eaton	5008d 08h	/socgen/trunk/doc/src/drawing/sch/
56	soc_builder now builds verilog from xml files	jt_eaton	5022d 18h	/socgen/trunk/doc/src/drawing/sch/
49	added covered code coverage added xml descriptors added soc_Link tool	jt_eaton	5028d 09h	/socgen/trunk/doc/src/drawing/sch/
39	added io_probe to sims added boot rom into 6502 added T6502_control	jt_eaton	5108d 05h	/socgen/trunk/doc/src/drawing/sch/
28	added T6502 processor added vga_char_ctrl	jt_eaton	5130d 17h	/socgen/trunk/doc/src/drawing/sch/
27	added uart and ps2 host and models added more documentation	jt_eaton	5152d 07h	/socgen/trunk/doc/src/drawing/sch/
20	added Nexys2 support expanded docs created tools directory	jt_eaton	5163d 05h	/socgen/trunk/doc/src/drawing/sch/
19	added serial_xmit module updated and added docs	jt_eaton	5170d 11h	/socgen/trunk/doc/src/drawing/sch/