OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [doc/] [src/] [guides/] - Rev 65

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
56 soc_builder now builds verilog from xml files jt_eaton 5164d 11h /socgen/trunk/doc/src/guides/
54 now set up fpga targets from xml files jt_eaton 5167d 08h /socgen/trunk/doc/src/guides/
49 added covered code coverage
added xml descriptors
added soc_Link tool
jt_eaton 5170d 02h /socgen/trunk/doc/src/guides/
28 added T6502 processor
added vga_char_ctrl
jt_eaton 5272d 10h /socgen/trunk/doc/src/guides/
27 added uart and ps2 host and models
added more documentation
jt_eaton 5294d 00h /socgen/trunk/doc/src/guides/
20 added Nexys2 support
expanded docs
created tools directory
jt_eaton 5304d 22h /socgen/trunk/doc/src/guides/
19 added serial_xmit module
updated and added docs
jt_eaton 5312d 04h /socgen/trunk/doc/src/guides/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.