OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [doc/] [src/] [png/] - Rev 120

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
120 clean up componentGenerators names and directories
sim + lint now synthesis TestBench
jt_eaton 4298d 21h /socgen/trunk/doc/src/png/
81 morphing xml files to use 1685
removed log directories
jt_eaton 4974d 22h /socgen/trunk/doc/src/png/
67 updated installs jt_eaton 5039d 15h /socgen/trunk/doc/src/png/
65 added params.sim to sims
updated install's
jt_eaton 5045d 15h /socgen/trunk/doc/src/png/
56 soc_builder now builds verilog from xml files jt_eaton 5060d 01h /socgen/trunk/doc/src/png/
49 added covered code coverage
added xml descriptors
added soc_Link tool
jt_eaton 5065d 16h /socgen/trunk/doc/src/png/
39 added io_probe to sims
added boot rom into 6502
added T6502_control
jt_eaton 5145d 12h /socgen/trunk/doc/src/png/
28 added T6502 processor
added vga_char_ctrl
jt_eaton 5168d 00h /socgen/trunk/doc/src/png/
27 added uart and ps2 host and models
added more documentation
jt_eaton 5189d 15h /socgen/trunk/doc/src/png/
20 added Nexys2 support
expanded docs
created tools directory
jt_eaton 5200d 12h /socgen/trunk/doc/src/png/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.