URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [tools/] [regtool/] - Rev 133

Rev	Log message	Author	Age	Path
131	Added elaboration databases and tools Added bus map creation tools	jt_eaton	3379d 13h	/socgen/trunk/tools/regtool/
130	Dec 2014 major release trimmed out some IP replaced perl database with Berkeley	jt_eaton	3483d 06h	/socgen/trunk/tools/regtool/
128	major cleanup added toolflows for sim,syn,documentation,linting and verilog added documentation tools	jt_eaton	3938d 12h	/socgen/trunk/tools/regtool/
127	final cleanup before DAC	jt_eaton	4053d 08h	/socgen/trunk/tools/regtool/
125	Added two new 6502 cores in www.6502.org cleaned up sogen xml files and added module name control	jt_eaton	4151d 07h	/socgen/trunk/tools/regtool/
120	clean up componentGenerators names and directories sim + lint now synthesis TestBench	jt_eaton	4265d 11h	/socgen/trunk/tools/regtool/
119	moved copyright files into /verilog changed cde copyright to apache from gplv3 split out tools into separate subdirectories changed design.xml files to socgen: namespace	jt_eaton	4300d 06h	/socgen/trunk/tools/regtool/