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[/] [spacewiresystemc/] - Rev 36

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Rev Log message Author Age Path
36 Corrections and try avoid disconnection error by parity error. redbear 2595d 15h /spacewiresystemc/
35 Updating Altera project. redbear 2607d 00h /spacewiresystemc/
34 Adding new fifo version rx/tx and tx spacewire. redbear 2607d 14h /spacewiresystemc/
33 Updating with corrections and additions. redbear 2621d 20h /spacewiresystemc/
32 Updating Altera De0 to work with fifos. redbear 2621d 20h /spacewiresystemc/
31 Adding compile stage to SystemC redbear 2715d 09h /spacewiresystemc/
30 Adding systemC environmment api redbear 2715d 09h /spacewiresystemc/
29 Adding systemC environmment model SpaceWire. redbear 2715d 09h /spacewiresystemc/
28 Adding version altera quatus lite 17.0. redbear 2715d 10h /spacewiresystemc/
27 Adding write axi and updating files. redbear 2715d 10h /spacewiresystemc/
26 Adding write axi and updating files. redbear 2715d 10h /spacewiresystemc/
25 Updating redbear 2715d 10h /spacewiresystemc/
24 Removing altera quartus 16.0 redbear 2715d 10h /spacewiresystemc/
23 FPGA verilog and corrections. redbear 2744d 10h /spacewiresystemc/
22 Adding files work to altera fpga DE0 NANO SOC. redbear 2744d 10h /spacewiresystemc/
21 Vpi data rx. redbear 2765d 09h /spacewiresystemc/
20 SystemC minor correction. redbear 2765d 09h /spacewiresystemc/
19 RX and TX correct. redbear 2765d 09h /spacewiresystemc/
18 FSM minor correction redbear 2772d 09h /spacewiresystemc/
17 TX correction FCT reaceive and TX data transfer. redbear 2772d 09h /spacewiresystemc/

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