OpenCores
URL https://opencores.org/ocsvn/spi/spi/trunk

Subversion Repositories spi

[/] [spi/] [tags/] [rel_5/] [rtl/] - Rev 15

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
15 Defines set in order. simons 7663d 06h /spi/tags/rel_5/rtl/
13 8-bit WB access enabled. simons 7664d 00h /spi/tags/rel_5/rtl/
10 Slave select signal generation bug fixed, default case added when reading registers, to avoid latches. simons 7702d 06h /spi/tags/rel_5/rtl/
9 Support for 128 bits character length added. Zero value divider bug fixed. simons 7743d 00h /spi/tags/rel_5/rtl/
8 Automatic slave select signal generation added. simons 7763d 01h /spi/tags/rel_5/rtl/
7 Support for 64 bit caharacter len added. simons 7851d 14h /spi/tags/rel_5/rtl/
2 Initial import simons 8050d 01h /spi/tags/rel_5/rtl/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.