URL https://opencores.org/ocsvn/spi/spi/trunk

Subversion Repositories spi

[/] [spi/] [tags/] [rel_5/] [rtl/] - Rev 17

Rev	Log message	Author	Age	Path
17	Define mess fixed.	simons	7691d 05h	/spi/tags/rel_5/rtl/
15	Defines set in order.	simons	7691d 09h	/spi/tags/rel_5/rtl/
13	8-bit WB access enabled.	simons	7692d 02h	/spi/tags/rel_5/rtl/
10	Slave select signal generation bug fixed, default case added when reading registers, to avoid latches.	simons	7730d 09h	/spi/tags/rel_5/rtl/
9	Support for 128 bits character length added. Zero value divider bug fixed.	simons	7771d 02h	/spi/tags/rel_5/rtl/
8	Automatic slave select signal generation added.	simons	7791d 03h	/spi/tags/rel_5/rtl/
7	Support for 64 bit caharacter len added.	simons	7879d 16h	/spi/tags/rel_5/rtl/
2	Initial import	simons	8078d 04h	/spi/tags/rel_5/rtl/