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[/] [t400/] [trunk/] [bench/] [vhdl/] - Rev 104

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Rev Log message Author Age Path
104 fix typo arniml 6575d 04h /t400/trunk/bench/vhdl/
97 lower nibble is OD to prevent contention with testbench arniml 6582d 20h /t400/trunk/bench/vhdl/
91 don't generate interrupt when in interrupt routine around 0x100 arniml 6583d 03h /t400/trunk/bench/vhdl/
78 provide SA at L port arniml 6583d 16h /t400/trunk/bench/vhdl/
73 use 'after' instead of wait for signal delay
should resolve problems with delta cycle arrival times
arniml 6583d 20h /t400/trunk/bench/vhdl/
67 explicitly select clock divider 4 arniml 6584d 00h /t400/trunk/bench/vhdl/
66 explicitly select clock divider 8 arniml 6584d 00h /t400/trunk/bench/vhdl/
65 add global signals for testbench instrumentation arniml 6584d 00h /t400/trunk/bench/vhdl/
64 add fail reporting for port d arniml 6584d 00h /t400/trunk/bench/vhdl/
63 initial check-in arniml 6584d 00h /t400/trunk/bench/vhdl/
60 connect cko_i to bit 2 of IN bus arniml 6587d 18h /t400/trunk/bench/vhdl/
58 consider IN port arniml 6588d 17h /t400/trunk/bench/vhdl/
57 consider CKO and IN port arniml 6588d 17h /t400/trunk/bench/vhdl/
56 drive IN port arniml 6588d 17h /t400/trunk/bench/vhdl/
31 extend D-port checks arniml 6593d 18h /t400/trunk/bench/vhdl/
29 enhance G-port check for T420 arniml 6594d 18h /t400/trunk/bench/vhdl/
20 initial check-in arniml 6595d 20h /t400/trunk/bench/vhdl/
19 moved elements to separate design unit tb_elems arniml 6595d 21h /t400/trunk/bench/vhdl/
18 initial check-in arniml 6595d 21h /t400/trunk/bench/vhdl/
15 initial check-in arniml 6596d 20h /t400/trunk/bench/vhdl/

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