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[/] [t400/] [trunk/] [rtl/] - Rev 54

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Rev Log message Author Age Path
54 use to_X01 for primary input bus arniml 6599d 01h /t400/trunk/rtl/
53 use to_X01 for G input arniml 6599d 01h /t400/trunk/rtl/
52 + reset neg_edge flip-flops to '1'
-> after por, a 1-to-0 edge is required to trigger the latches initially
+ use to_X01
arniml 6599d 01h /t400/trunk/rtl/
49 io_in added arniml 6600d 02h /t400/trunk/rtl/
48 instructions ININ and INIL implemented arniml 6600d 02h /t400/trunk/rtl/
47 simplify ININ/INIL instruction support arniml 6600d 02h /t400/trunk/rtl/
46 operations for IN port added arniml 6600d 02h /t400/trunk/rtl/
45 initial check-in arniml 6600d 02h /t400/trunk/rtl/
43 route cko to ALU for INIL instruction arniml 6600d 05h /t400/trunk/rtl/
39 select CK divide by 8 arniml 6602d 00h /t400/trunk/rtl/
37 timer module included arniml 6602d 00h /t400/trunk/rtl/
36 skip-on-timer implemented arniml 6602d 00h /t400/trunk/rtl/
35 initial check-in arniml 6602d 00h /t400/trunk/rtl/
27 connect missing input direction for IO G arniml 6605d 02h /t400/trunk/rtl/
15 initial check-in arniml 6607d 04h /t400/trunk/rtl/
14 t420 hierarchies added arniml 6607d 04h /t400/trunk/rtl/
13 hand-down clock divider option arniml 6614d 00h /t400/trunk/rtl/
12 fix sensitivity list arniml 6615d 00h /t400/trunk/rtl/
11 renamed to rtl arniml 6615d 01h /t400/trunk/rtl/
10 renamed t400_por configuration to rtl arniml 6615d 01h /t400/trunk/rtl/

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