OpenCores
URL https://opencores.org/ocsvn/t400/t400/trunk

Subversion Repositories t400

[/] [t400/] [trunk/] [sw/] - Rev 42

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
42 add note about INL verification arniml 6652d 09h /t400/trunk/sw/
41 initial check-in arniml 6653d 00h /t400/trunk/sw/
40 initial check-in arniml 6653d 09h /t400/trunk/sw/
35 initial check-in arniml 6654d 00h /t400/trunk/sw/
34 initial check-in arniml 6654d 01h /t400/trunk/sw/
33 initial check-in arniml 6655d 02h /t400/trunk/sw/
32 initial check-in arniml 6656d 01h /t400/trunk/sw/
30 adapt for T420 testbench arniml 6656d 02h /t400/trunk/sw/
28 adjust G port signalling to current T420 TB implementation arniml 6657d 02h /t400/trunk/sw/
26 fix org for page 11 in COP420 code arniml 6657d 02h /t400/trunk/sw/
25 fix wrong aisc commands arniml 6657d 03h /t400/trunk/sw/
24 finalize test arniml 6657d 04h /t400/trunk/sw/
23 finalize test arniml 6657d 19h /t400/trunk/sw/
22 finish test arniml 6658d 03h /t400/trunk/sw/
17 remove direct specification of cpu type arniml 6659d 04h /t400/trunk/sw/
16 enabled t420 support arniml 6659d 04h /t400/trunk/sw/
6 initial check-in arniml 6667d 13h /t400/trunk/sw/
5 initial check-in arniml 6668d 01h /t400/trunk/sw/
2 import from local CVS repository, LOC_CVS_0_1 arniml 6668d 01h /t400/trunk/sw/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.