OpenCores
URL https://opencores.org/ocsvn/t400/t400/trunk

Subversion Repositories t400

[/] [t400/] [trunk/] [sw/] [verif/] - Rev 34

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
34 initial check-in arniml 6602d 16h /t400/trunk/sw/verif/
33 initial check-in arniml 6603d 17h /t400/trunk/sw/verif/
32 initial check-in arniml 6604d 17h /t400/trunk/sw/verif/
30 adapt for T420 testbench arniml 6604d 17h /t400/trunk/sw/verif/
28 adjust G port signalling to current T420 TB implementation arniml 6605d 17h /t400/trunk/sw/verif/
26 fix org for page 11 in COP420 code arniml 6605d 17h /t400/trunk/sw/verif/
25 fix wrong aisc commands arniml 6605d 18h /t400/trunk/sw/verif/
24 finalize test arniml 6605d 19h /t400/trunk/sw/verif/
23 finalize test arniml 6606d 10h /t400/trunk/sw/verif/
22 finish test arniml 6606d 18h /t400/trunk/sw/verif/
17 remove direct specification of cpu type arniml 6607d 19h /t400/trunk/sw/verif/
16 enabled t420 support arniml 6607d 19h /t400/trunk/sw/verif/
6 initial check-in arniml 6616d 05h /t400/trunk/sw/verif/
2 import from local CVS repository, LOC_CVS_0_1 arniml 6616d 16h /t400/trunk/sw/verif/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.