URL https://opencores.org/ocsvn/t400/t400/trunk

Subversion Repositories t400

[/] [t400/] [trunk/] [sw/] [verif/] [black_box/] - Rev 32

Rev	Log message	Author	Age	Path
32	initial check-in	arniml	6605d 17h	/t400/trunk/sw/verif/black_box/
30	adapt for T420 testbench	arniml	6605d 18h	/t400/trunk/sw/verif/black_box/
28	adjust G port signalling to current T420 TB implementation	arniml	6606d 18h	/t400/trunk/sw/verif/black_box/
26	fix org for page 11 in COP420 code	arniml	6606d 18h	/t400/trunk/sw/verif/black_box/
25	fix wrong aisc commands	arniml	6606d 19h	/t400/trunk/sw/verif/black_box/
24	finalize test	arniml	6606d 20h	/t400/trunk/sw/verif/black_box/
23	finalize test	arniml	6607d 11h	/t400/trunk/sw/verif/black_box/
22	finish test	arniml	6607d 19h	/t400/trunk/sw/verif/black_box/
17	remove direct specification of cpu type	arniml	6608d 20h	/t400/trunk/sw/verif/black_box/
6	initial check-in	arniml	6617d 05h	/t400/trunk/sw/verif/black_box/
2	import from local CVS repository, LOC_CVS_0_1	arniml	6617d 17h	/t400/trunk/sw/verif/black_box/