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[/] [t48/] [tags/] [rel_0_1_beta/] - Rev 63

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Rev	Log message	Author	Age	Path
63	reset machine state to MSTATE3 to allow proper instruction fetch after reset	arniml	7415d 09h	/t48/tags/rel_0_1_beta/
62	initial check-in	arniml	7415d 09h	/t48/tags/rel_0_1_beta/
61	expand script for dump compare	arniml	7417d 05h	/t48/tags/rel_0_1_beta/
60	+ add marker for injected calls + suppress intstruction strobes for injected calls	arniml	7418d 05h	/t48/tags/rel_0_1_beta/
59	increment prescaler with MSTATE4	arniml	7418d 05h	/t48/tags/rel_0_1_beta/
58	add periodic interrupt	arniml	7418d 05h	/t48/tags/rel_0_1_beta/
57	abort if no interrupt occurs	arniml	7418d 05h	/t48/tags/rel_0_1_beta/
56	wait for instruction strobe after final end-of-simulation detection this ensures that the last mov instruction is part of the dump and enables 100% matching with i8039 simulator	arniml	7419d 06h	/t48/tags/rel_0_1_beta/
55	add dependency to tb_behav_pack for decoder	arniml	7419d 07h	/t48/tags/rel_0_1_beta/
54	- add tb_istrobe_s	arniml	7419d 07h	/t48/tags/rel_0_1_beta/
53	make istrobe visible through testbench package	arniml	7419d 07h	/t48/tags/rel_0_1_beta/
52	+ fix bug in PSW[3] + read SP properly for dump	arniml	7419d 07h	/t48/tags/rel_0_1_beta/
51	+ implement Port1 and Port2 + connect T0 and T1 + return proper program memory contents	arniml	7419d 07h	/t48/tags/rel_0_1_beta/
49	Imported sources	arniml	7424d 08h	/t48/tags/rel_0_1_beta/
48	update copyright notice	arniml	7424d 08h	/t48/tags/rel_0_1_beta/
47	initial check-in	arniml	7424d 08h	/t48/tags/rel_0_1_beta/
46	fix test	arniml	7426d 05h	/t48/tags/rel_0_1_beta/
45	remove unused signals	arniml	7426d 05h	/t48/tags/rel_0_1_beta/
44	default assignment for aux_carry_o	arniml	7426d 07h	/t48/tags/rel_0_1_beta/
43	fix sensitivity list	arniml	7427d 07h	/t48/tags/rel_0_1_beta/

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Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_1_beta/] - Rev 63

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