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[/] [t48/] [tags/] [rel_0_1_beta/] [bench/] - Rev 344

Rev	Log message	Author	Age	Path
292	New directory structure.	root	5571d 15h	/t48/tags/rel_0_1_beta/bench/
251	This commit was manufactured by cvs2svn to create tag 'rel_0_1_beta'.		6542d 00h	/t48/tags/rel_0_1_beta/bench/
83	connect if_timing to P2 output of T48	arniml	7351d 04h	/t48/tags/rel_0_1_beta/bench/
82	check expander timings	arniml	7351d 04h	/t48/tags/rel_0_1_beta/bench/
81	initial check-in	arniml	7351d 08h	/t48/tags/rel_0_1_beta/bench/
80	added if_timing	arniml	7351d 08h	/t48/tags/rel_0_1_beta/bench/
68	connect T0 and T1 to P1	arniml	7358d 06h	/t48/tags/rel_0_1_beta/bench/
67	initial check-in	arniml	7358d 06h	/t48/tags/rel_0_1_beta/bench/
56	wait for instruction strobe after final end-of-simulation detection this ensures that the last mov instruction is part of the dump and enables 100% matching with i8039 simulator	arniml	7362d 04h	/t48/tags/rel_0_1_beta/bench/
33	rename pX_limp to pX_low_imp	arniml	7378d 05h	/t48/tags/rel_0_1_beta/bench/
30	connect prog_n_o	arniml	7379d 03h	/t48/tags/rel_0_1_beta/bench/
19	enhance simulation result string	arniml	7381d 02h	/t48/tags/rel_0_1_beta/bench/
10	put ext_ram on falling clock edge to sample the write enable proberly	arniml	7383d 01h	/t48/tags/rel_0_1_beta/bench/
8	initial check-in	arniml	7383d 03h	/t48/tags/rel_0_1_beta/bench/