URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_1_beta/] [sw/] [verif/] - Rev 345

Rev	Log message	Author	Age	Path
292	New directory structure.	root	5607d 11h	/t48/tags/rel_0_1_beta/sw/verif/
251	This commit was manufactured by cvs2svn to create tag 'rel_0_1_beta'.		6577d 20h	/t48/tags/rel_0_1_beta/sw/verif/
87	abort gracfullt if memory bank switching does not work	arniml	7381d 03h	/t48/tags/rel_0_1_beta/sw/verif/
85	initial check-in	arniml	7381d 09h	/t48/tags/rel_0_1_beta/sw/verif/
57	abort if no interrupt occurs	arniml	7396d 23h	/t48/tags/rel_0_1_beta/sw/verif/
46	fix test	arniml	7404d 23h	/t48/tags/rel_0_1_beta/sw/verif/
42	change test values that match better to the test case	arniml	7406d 03h	/t48/tags/rel_0_1_beta/sw/verif/
39	initial check-in	arniml	7408d 06h	/t48/tags/rel_0_1_beta/sw/verif/
36	make calculation of expected value more readable	arniml	7408d 07h	/t48/tags/rel_0_1_beta/sw/verif/
34	fix test wrt AC	arniml	7414d 01h	/t48/tags/rel_0_1_beta/sw/verif/
25	initial check-in	arniml	7415d 00h	/t48/tags/rel_0_1_beta/sw/verif/
18	fix constant format	arniml	7416d 22h	/t48/tags/rel_0_1_beta/sw/verif/
17	fix test	arniml	7416d 22h	/t48/tags/rel_0_1_beta/sw/verif/
14	initial check-in	arniml	7417d 22h	/t48/tags/rel_0_1_beta/sw/verif/
12	Imported sources	arniml	7417d 22h	/t48/tags/rel_0_1_beta/sw/verif/