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[/] [t48/] [tags/] [rel_0_3_beta/] - Rev 47

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Rev Log message Author Age Path
47 initial check-in arniml 7403d 00h /t48/tags/rel_0_3_beta/
46 fix test arniml 7404d 21h /t48/tags/rel_0_3_beta/
45 remove unused signals arniml 7404d 22h /t48/tags/rel_0_3_beta/
44 default assignment for aux_carry_o arniml 7404d 23h /t48/tags/rel_0_3_beta/
43 fix sensitivity list arniml 7405d 23h /t48/tags/rel_0_3_beta/
42 change test values that match better to the test case arniml 7406d 01h /t48/tags/rel_0_3_beta/
41 expand PATH arniml 7406d 01h /t48/tags/rel_0_3_beta/
40 rework adder and force resource sharing between ADD, INC and DEC arniml 7406d 01h /t48/tags/rel_0_3_beta/
39 initial check-in arniml 7408d 05h /t48/tags/rel_0_3_beta/
38 add measures to implement XCHD arniml 7408d 05h /t48/tags/rel_0_3_beta/
37 add dump_compare support arniml 7408d 05h /t48/tags/rel_0_3_beta/
36 make calculation of expected value more readable arniml 7408d 06h /t48/tags/rel_0_3_beta/
35 initial check-in arniml 7410d 23h /t48/tags/rel_0_3_beta/
34 fix test wrt AC arniml 7413d 23h /t48/tags/rel_0_3_beta/
33 rename pX_limp to pX_low_imp arniml 7414d 00h /t48/tags/rel_0_3_beta/
32 rename pX_limp to pX_low_imp arniml 7414d 00h /t48/tags/rel_0_3_beta/
31 refer PROJECT_DIR variable arniml 7414d 00h /t48/tags/rel_0_3_beta/
30 connect prog_n_o arniml 7414d 22h /t48/tags/rel_0_3_beta/
29 take auxiliary carry from direct ALU connection arniml 7414d 22h /t48/tags/rel_0_3_beta/
28 update wiring for DA support arniml 7414d 22h /t48/tags/rel_0_3_beta/

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