URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_3_beta/] [sw/] - Rev 292

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
292	New directory structure.	root	5589d 00h	/t48/tags/rel_0_3_beta/sw/
253	This commit was manufactured by cvs2svn to create tag 'rel_0_3_beta'.		6559d 09h	/t48/tags/rel_0_3_beta/sw/
127	+ log status of A11 properly during interrupt routines + trigger counter on negative edge of T1 instead of positive edge	arniml	7298d 22h	/t48/tags/rel_0_3_beta/sw/
126	+ specify hex file for external ROM on i8039 command line + support for no_dump_compare file in test cell	arniml	7298d 22h	/t48/tags/rel_0_3_beta/sw/
125	exclude from dump compare	arniml	7298d 22h	/t48/tags/rel_0_3_beta/sw/
124	fix wrong handling of MB after return from interrupt	arniml	7299d 19h	/t48/tags/rel_0_3_beta/sw/
123	support hex file for external ROM	arniml	7299d 19h	/t48/tags/rel_0_3_beta/sw/
122	test MB after return from interrupt	arniml	7299d 20h	/t48/tags/rel_0_3_beta/sw/
118	test MB/interrupt behaviour according to bug report "Program Memory bank can be switched during interrupt"	arniml	7302d 13h	/t48/tags/rel_0_3_beta/sw/
113	generate two ROM files based on address: + 0 - 2047 : 2k internal ROM + 2048 - 4095 : 2k external ROM	arniml	7342d 23h	/t48/tags/rel_0_3_beta/sw/
104	add white_box directory to test suite	arniml	7346d 19h	/t48/tags/rel_0_3_beta/sw/
102	update for changes in address space of external memory	arniml	7346d 19h	/t48/tags/rel_0_3_beta/sw/
99	initial check-in	arniml	7346d 20h	/t48/tags/rel_0_3_beta/sw/
97	initial check-in	arniml	7346d 20h	/t48/tags/rel_0_3_beta/sw/
96	select dedicated directorie(s) for regression	arniml	7347d 18h	/t48/tags/rel_0_3_beta/sw/
95	check counter inactivity	arniml	7347d 18h	/t48/tags/rel_0_3_beta/sw/
94	initial check-in	arniml	7347d 18h	/t48/tags/rel_0_3_beta/sw/
90	intial check-in	arniml	7347d 19h	/t48/tags/rel_0_3_beta/sw/
89	initial check-in	arniml	7361d 15h	/t48/tags/rel_0_3_beta/sw/
88	allow memory bank switching during interrupts	arniml	7362d 17h	/t48/tags/rel_0_3_beta/sw/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_3_beta/] [sw/] - Rev 292

Filtering Options