OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_5_beta/] - Rev 109

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
109 add new bug for release 0.1 BETA arniml 7362d 06h /t48/tags/rel_0_5_beta/
108 Fix for:
External Program Memory ignored when EA = 0
arniml 7362d 07h /t48/tags/rel_0_5_beta/
107 tie EA to '1' arniml 7362d 07h /t48/tags/rel_0_5_beta/
106 clean-up use of ea_i arniml 7362d 07h /t48/tags/rel_0_5_beta/
105 initial check-in
describe bugs of release 0.1 BETA
arniml 7364d 16h /t48/tags/rel_0_5_beta/
104 add white_box directory to test suite arniml 7365d 14h /t48/tags/rel_0_5_beta/
103 add testbench peripherals for P1 and P2
this became necessary to observe a difference between externally applied
port data and internally applied port data
arniml 7365d 14h /t48/tags/rel_0_5_beta/
102 update for changes in address space of external memory arniml 7365d 14h /t48/tags/rel_0_5_beta/
101 assert p2_read_p2_o when expander port is read arniml 7365d 14h /t48/tags/rel_0_5_beta/
100 reorder data_o generation arniml 7365d 14h /t48/tags/rel_0_5_beta/
99 initial check-in arniml 7365d 14h /t48/tags/rel_0_5_beta/
98 Fix bug "ANL and ORL to P1/P2 read port status instead of port output register" arniml 7365d 15h /t48/tags/rel_0_5_beta/
97 initial check-in arniml 7365d 15h /t48/tags/rel_0_5_beta/
96 select dedicated directorie(s) for regression arniml 7366d 12h /t48/tags/rel_0_5_beta/
95 check counter inactivity arniml 7366d 12h /t48/tags/rel_0_5_beta/
94 initial check-in arniml 7366d 12h /t48/tags/rel_0_5_beta/
93 add support for line coverage evaluation with gcov arniml 7366d 13h /t48/tags/rel_0_5_beta/
92 work around bug in Quartus II 4.0 arniml 7366d 13h /t48/tags/rel_0_5_beta/
91 fix edge detector bug for counter arniml 7366d 13h /t48/tags/rel_0_5_beta/
90 intial check-in arniml 7366d 13h /t48/tags/rel_0_5_beta/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.