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[/] [t48/] [tags/] [rel_0_6_1_beta/] - Rev 142

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Rev	Log message	Author	Age	Path
142	deassert rd_q, wr_q and prog_q at end of XTAL3	arniml	7234d 16h	/t48/tags/rel_0_6_1_beta/
141	disable external memory to avoid conflicts with outl a, bus	arniml	7234d 16h	/t48/tags/rel_0_6_1_beta/
140	remove tAW sanity check conflicts with OUTL A, BUS	arniml	7234d 16h	/t48/tags/rel_0_6_1_beta/
139	add bug P1 constantly in push-pull mode in t8048	arniml	7236d 02h	/t48/tags/rel_0_6_1_beta/
138	Fix for: P1 constantly in push-pull mode in t8048	arniml	7236d 02h	/t48/tags/rel_0_6_1_beta/
137	add link to COMPILE_LIST	arniml	7273d 15h	/t48/tags/rel_0_6_1_beta/
136	initial check-in	arniml	7273d 15h	/t48/tags/rel_0_6_1_beta/
135	add bug PSENn Timing	arniml	7278d 01h	/t48/tags/rel_0_6_1_beta/
134	Fix bug report: "PSENn Timing" PSEN is now only asserted for the second cycle if explicitely requested by assert_psen_s. The previous implementation asserted PSEN together with RD or WR.	arniml	7278d 11h	/t48/tags/rel_0_6_1_beta/
133	add checks for PSEN	arniml	7278d 11h	/t48/tags/rel_0_6_1_beta/
132	stop simulation upon assertion error	arniml	7278d 11h	/t48/tags/rel_0_6_1_beta/
131	update	arniml	7278d 11h	/t48/tags/rel_0_6_1_beta/
130	initial check-in	arniml	7278d 11h	/t48/tags/rel_0_6_1_beta/
129	cleanup copyright notice	arniml	7340d 19h	/t48/tags/rel_0_6_1_beta/
128	counter_q is not cleared during reset this would match all different descriptions of the Counter as a) if the software assumes that the Counter is modified during reset, it will initialize the Counter anyhow b) the special case 'Counter not modified during reset' is covered	arniml	7347d 22h	/t48/tags/rel_0_6_1_beta/
127	+ log status of A11 properly during interrupt routines + trigger counter on negative edge of T1 instead of positive edge	arniml	7347d 23h	/t48/tags/rel_0_6_1_beta/
126	+ specify hex file for external ROM on i8039 command line + support for no_dump_compare file in test cell	arniml	7347d 23h	/t48/tags/rel_0_6_1_beta/
125	exclude from dump compare	arniml	7347d 23h	/t48/tags/rel_0_6_1_beta/
124	fix wrong handling of MB after return from interrupt	arniml	7348d 21h	/t48/tags/rel_0_6_1_beta/
123	support hex file for external ROM	arniml	7348d 21h	/t48/tags/rel_0_6_1_beta/

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[/] [t48/] [tags/] [rel_0_6_1_beta/] - Rev 142

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