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[/] [t48/] [tags/] [rel_0_6_1_beta/] [sw/] - Rev 102

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Rev	Log message	Author	Age	Path
102	update for changes in address space of external memory	arniml	7395d 05h	/t48/tags/rel_0_6_1_beta/sw/
99	initial check-in	arniml	7395d 05h	/t48/tags/rel_0_6_1_beta/sw/
97	initial check-in	arniml	7395d 06h	/t48/tags/rel_0_6_1_beta/sw/
96	select dedicated directorie(s) for regression	arniml	7396d 03h	/t48/tags/rel_0_6_1_beta/sw/
95	check counter inactivity	arniml	7396d 03h	/t48/tags/rel_0_6_1_beta/sw/
94	initial check-in	arniml	7396d 03h	/t48/tags/rel_0_6_1_beta/sw/
90	intial check-in	arniml	7396d 04h	/t48/tags/rel_0_6_1_beta/sw/
89	initial check-in	arniml	7410d 00h	/t48/tags/rel_0_6_1_beta/sw/
88	allow memory bank switching during interrupts	arniml	7411d 02h	/t48/tags/rel_0_6_1_beta/sw/
87	abort gracfullt if memory bank switching does not work	arniml	7411d 02h	/t48/tags/rel_0_6_1_beta/sw/
85	initial check-in	arniml	7411d 08h	/t48/tags/rel_0_6_1_beta/sw/
74	enhance pass/fail detection	arniml	7418d 08h	/t48/tags/rel_0_6_1_beta/sw/
70	clean test cell before make	arniml	7424d 01h	/t48/tags/rel_0_6_1_beta/sw/
69	fix name of istrobe	arniml	7424d 01h	/t48/tags/rel_0_6_1_beta/sw/
61	expand script for dump compare	arniml	7425d 21h	/t48/tags/rel_0_6_1_beta/sw/
58	add periodic interrupt	arniml	7426d 22h	/t48/tags/rel_0_6_1_beta/sw/
57	abort if no interrupt occurs	arniml	7426d 22h	/t48/tags/rel_0_6_1_beta/sw/
52	+ fix bug in PSW[3] + read SP properly for dump	arniml	7427d 23h	/t48/tags/rel_0_6_1_beta/sw/
51	+ implement Port1 and Port2 + connect T0 and T1 + return proper program memory contents	arniml	7427d 23h	/t48/tags/rel_0_6_1_beta/sw/
49	Imported sources	arniml	7433d 00h	/t48/tags/rel_0_6_1_beta/sw/

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Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_6_1_beta/] [sw/] - Rev 102

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