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[/] [t48/] [tags/] [rel_0_6_beta/] - Rev 136

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Rev Log message Author Age Path
136 initial check-in arniml 7224d 05h /t48/tags/rel_0_6_beta/
135 add bug
PSENn Timing		 arniml 7228d 15h /t48/tags/rel_0_6_beta/
134 Fix bug report:
"PSENn Timing"
PSEN is now only asserted for the second cycle if explicitely
requested by assert_psen_s.
The previous implementation asserted PSEN together with RD or WR.		 arniml 7229d 01h /t48/tags/rel_0_6_beta/
133 add checks for PSEN arniml 7229d 01h /t48/tags/rel_0_6_beta/
132 stop simulation upon assertion error arniml 7229d 01h /t48/tags/rel_0_6_beta/
131 update arniml 7229d 01h /t48/tags/rel_0_6_beta/
130 initial check-in arniml 7229d 01h /t48/tags/rel_0_6_beta/
129 cleanup copyright notice arniml 7291d 09h /t48/tags/rel_0_6_beta/
128 counter_q is not cleared during reset
this would match all different descriptions of the Counter as
a) if the software assumes that the Counter is modified during reset, it
will initialize the Counter anyhow
b) the special case 'Counter not modified during reset' is covered		 arniml 7298d 12h /t48/tags/rel_0_6_beta/
127 + log status of A11 properly during interrupt routines
+ trigger counter on negative edge of T1 instead of positive edge		 arniml 7298d 13h /t48/tags/rel_0_6_beta/
126 + specify hex file for external ROM on i8039 command line
+ support for no_dump_compare file in test cell		 arniml 7298d 13h /t48/tags/rel_0_6_beta/
125 exclude from dump compare arniml 7298d 13h /t48/tags/rel_0_6_beta/
124 fix wrong handling of MB after return from interrupt arniml 7299d 11h /t48/tags/rel_0_6_beta/
123 support hex file for external ROM arniml 7299d 11h /t48/tags/rel_0_6_beta/
122 test MB after return from interrupt arniml 7299d 11h /t48/tags/rel_0_6_beta/
121 update bug description for
Program Memory bank can be switched during interrupt		 arniml 7302d 04h /t48/tags/rel_0_6_beta/
120 Fix bug report:
"Program Memory bank can be switched during interrupt"
int module emits int_in_progress signal that is used inside the decoder
to hold mb low for JMP and CALL during interrupts		 arniml 7302d 04h /t48/tags/rel_0_6_beta/
119 add int_in_progress_o to entity of int module arniml 7302d 04h /t48/tags/rel_0_6_beta/
118 test MB/interrupt behaviour according to bug report
"Program Memory bank can be switched during interrupt"		 arniml 7302d 04h /t48/tags/rel_0_6_beta/
117 add bug
Program Memory bank can be switched during interrupt		 arniml 7303d 05h /t48/tags/rel_0_6_beta/

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