URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_0_6_beta/] - Rev 42

Rev	Log message	Author	Age	Path
42	change test values that match better to the test case	arniml	7461d 06h	/t48/tags/rel_0_6_beta/
41	expand PATH	arniml	7461d 06h	/t48/tags/rel_0_6_beta/
40	rework adder and force resource sharing between ADD, INC and DEC	arniml	7461d 06h	/t48/tags/rel_0_6_beta/
39	initial check-in	arniml	7463d 10h	/t48/tags/rel_0_6_beta/
38	add measures to implement XCHD	arniml	7463d 10h	/t48/tags/rel_0_6_beta/
37	add dump_compare support	arniml	7463d 10h	/t48/tags/rel_0_6_beta/
36	make calculation of expected value more readable	arniml	7463d 11h	/t48/tags/rel_0_6_beta/
35	initial check-in	arniml	7466d 03h	/t48/tags/rel_0_6_beta/
34	fix test wrt AC	arniml	7469d 04h	/t48/tags/rel_0_6_beta/
33	rename pX_limp to pX_low_imp	arniml	7469d 04h	/t48/tags/rel_0_6_beta/
32	rename pX_limp to pX_low_imp	arniml	7469d 04h	/t48/tags/rel_0_6_beta/
31	refer PROJECT_DIR variable	arniml	7469d 04h	/t48/tags/rel_0_6_beta/
30	connect prog_n_o	arniml	7470d 03h	/t48/tags/rel_0_6_beta/
29	take auxiliary carry from direct ALU connection	arniml	7470d 03h	/t48/tags/rel_0_6_beta/
28	update wiring for DA support	arniml	7470d 03h	/t48/tags/rel_0_6_beta/
27	implemented mnemonic DA	arniml	7470d 03h	/t48/tags/rel_0_6_beta/
26	support for DA instruction	arniml	7470d 03h	/t48/tags/rel_0_6_beta/
25	initial check-in	arniml	7470d 03h	/t48/tags/rel_0_6_beta/
24	connect control signal for Port 2 expander	arniml	7470d 11h	/t48/tags/rel_0_6_beta/
23	rework Port 2 expander handling	arniml	7470d 11h	/t48/tags/rel_0_6_beta/