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[/] [t48/] [tags/] [rel_0_6_beta/] - Rev 56

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56 wait for instruction strobe after final end-of-simulation detection
this ensures that the last mov instruction is part of the dump and
enables 100% matching with i8039 simulator
arniml 7493d 00h /t48/tags/rel_0_6_beta/
55 add dependency to tb_behav_pack for decoder arniml 7493d 00h /t48/tags/rel_0_6_beta/
54 - add tb_istrobe_s arniml 7493d 00h /t48/tags/rel_0_6_beta/
53 make istrobe visible through testbench package arniml 7493d 00h /t48/tags/rel_0_6_beta/
52 + fix bug in PSW[3]
+ read SP properly for dump
arniml 7493d 00h /t48/tags/rel_0_6_beta/
51 + implement Port1 and Port2
+ connect T0 and T1
+ return proper program memory contents
arniml 7493d 00h /t48/tags/rel_0_6_beta/
49 Imported sources arniml 7498d 01h /t48/tags/rel_0_6_beta/
48 update copyright notice arniml 7498d 01h /t48/tags/rel_0_6_beta/
47 initial check-in arniml 7498d 01h /t48/tags/rel_0_6_beta/
46 fix test arniml 7499d 22h /t48/tags/rel_0_6_beta/
45 remove unused signals arniml 7499d 22h /t48/tags/rel_0_6_beta/
44 default assignment for aux_carry_o arniml 7500d 00h /t48/tags/rel_0_6_beta/
43 fix sensitivity list arniml 7501d 00h /t48/tags/rel_0_6_beta/
42 change test values that match better to the test case arniml 7501d 02h /t48/tags/rel_0_6_beta/
41 expand PATH arniml 7501d 02h /t48/tags/rel_0_6_beta/
40 rework adder and force resource sharing between ADD, INC and DEC arniml 7501d 02h /t48/tags/rel_0_6_beta/
39 initial check-in arniml 7503d 06h /t48/tags/rel_0_6_beta/
38 add measures to implement XCHD arniml 7503d 06h /t48/tags/rel_0_6_beta/
37 add dump_compare support arniml 7503d 06h /t48/tags/rel_0_6_beta/
36 make calculation of expected value more readable arniml 7503d 07h /t48/tags/rel_0_6_beta/

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