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Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] - Rev 104

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Rev	Log message	Author	Age	Path
104	add white_box directory to test suite	arniml	7391d 22h	/t48/tags/rel_1_0/
103	add testbench peripherals for P1 and P2 this became necessary to observe a difference between externally applied port data and internally applied port data	arniml	7391d 22h	/t48/tags/rel_1_0/
102	update for changes in address space of external memory	arniml	7391d 22h	/t48/tags/rel_1_0/
101	assert p2_read_p2_o when expander port is read	arniml	7391d 22h	/t48/tags/rel_1_0/
100	reorder data_o generation	arniml	7391d 22h	/t48/tags/rel_1_0/
99	initial check-in	arniml	7391d 22h	/t48/tags/rel_1_0/
98	Fix bug "ANL and ORL to P1/P2 read port status instead of port output register"	arniml	7391d 23h	/t48/tags/rel_1_0/
97	initial check-in	arniml	7391d 23h	/t48/tags/rel_1_0/
96	select dedicated directorie(s) for regression	arniml	7392d 20h	/t48/tags/rel_1_0/
95	check counter inactivity	arniml	7392d 20h	/t48/tags/rel_1_0/
94	initial check-in	arniml	7392d 20h	/t48/tags/rel_1_0/
93	add support for line coverage evaluation with gcov	arniml	7392d 21h	/t48/tags/rel_1_0/
92	work around bug in Quartus II 4.0	arniml	7392d 21h	/t48/tags/rel_1_0/
91	fix edge detector bug for counter	arniml	7392d 21h	/t48/tags/rel_1_0/
90	intial check-in	arniml	7392d 21h	/t48/tags/rel_1_0/
89	initial check-in	arniml	7406d 17h	/t48/tags/rel_1_0/
88	allow memory bank switching during interrupts	arniml	7407d 19h	/t48/tags/rel_1_0/
87	abort gracfullt if memory bank switching does not work	arniml	7407d 19h	/t48/tags/rel_1_0/
86	update notice about expander port instructions	arniml	7408d 00h	/t48/tags/rel_1_0/
85	initial check-in	arniml	7408d 00h	/t48/tags/rel_1_0/

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Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] - Rev 104

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