URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] - Rev 232

Rev	Log message	Author	Age	Path
232	update to new memory concept	arniml	6626d 04h	/t48/tags/rel_1_0/
231	obsoleted by new memory concept	arniml	6626d 04h	/t48/tags/rel_1_0/
230	simplify shell command execution	arniml	6626d 04h	/t48/tags/rel_1_0/
229	rework hex/simulation targets	arniml	6626d 04h	/t48/tags/rel_1_0/
228	replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom/t3x_rom	arniml	6626d 04h	/t48/tags/rel_1_0/
227	replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom	arniml	6626d 04h	/t48/tags/rel_1_0/
226	replaced syn_ram with generic_ram_ena	arniml	6626d 04h	/t48/tags/rel_1_0/
225	replaced syn_rom and syn_ram with t48_rom and generic_ram_ena	arniml	6626d 04h	/t48/tags/rel_1_0/
224	initial check-in	arniml	6626d 04h	/t48/tags/rel_1_0/
223	obsoleted	arniml	6626d 04h	/t48/tags/rel_1_0/
222	add note about clock enable for data memory RAM macro	arniml	6627d 04h	/t48/tags/rel_1_0/
221	new input xtal_en_i	arniml	6627d 04h	/t48/tags/rel_1_0/
220	new input xtal_en_i	arniml	6627d 04h	/t48/tags/rel_1_0/
219	new input xtal_en_i gates xtal_i base clock	arniml	6627d 04h	/t48/tags/rel_1_0/
218	simplifications	arniml	6713d 12h	/t48/tags/rel_1_0/
217	update for release 0.6.1 beta	arniml	6782d 08h	/t48/tags/rel_1_0/
216	assign clk_i to outclock	arniml	6844d 08h	/t48/tags/rel_1_0/
215	suppress p2_output_pch_o when MOVX operation is accessing the external memory	arniml	6844d 08h	/t48/tags/rel_1_0/
214	fix sensitivity list	arniml	6851d 10h	/t48/tags/rel_1_0/
213	properly drive P1 and P2 with low impedance markers	arniml	6856d 05h	/t48/tags/rel_1_0/