URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] - Rev 63

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
63	reset machine state to MSTATE3 to allow proper instruction fetch after reset	arniml	7450d 07h	/t48/tags/rel_1_0/
62	initial check-in	arniml	7450d 07h	/t48/tags/rel_1_0/
61	expand script for dump compare	arniml	7452d 04h	/t48/tags/rel_1_0/
60	+ add marker for injected calls + suppress intstruction strobes for injected calls	arniml	7453d 04h	/t48/tags/rel_1_0/
59	increment prescaler with MSTATE4	arniml	7453d 04h	/t48/tags/rel_1_0/
58	add periodic interrupt	arniml	7453d 04h	/t48/tags/rel_1_0/
57	abort if no interrupt occurs	arniml	7453d 04h	/t48/tags/rel_1_0/
56	wait for instruction strobe after final end-of-simulation detection this ensures that the last mov instruction is part of the dump and enables 100% matching with i8039 simulator	arniml	7454d 05h	/t48/tags/rel_1_0/
55	add dependency to tb_behav_pack for decoder	arniml	7454d 05h	/t48/tags/rel_1_0/
54	- add tb_istrobe_s	arniml	7454d 05h	/t48/tags/rel_1_0/
53	make istrobe visible through testbench package	arniml	7454d 05h	/t48/tags/rel_1_0/
52	+ fix bug in PSW[3] + read SP properly for dump	arniml	7454d 05h	/t48/tags/rel_1_0/
51	+ implement Port1 and Port2 + connect T0 and T1 + return proper program memory contents	arniml	7454d 05h	/t48/tags/rel_1_0/
49	Imported sources	arniml	7459d 06h	/t48/tags/rel_1_0/
48	update copyright notice	arniml	7459d 07h	/t48/tags/rel_1_0/
47	initial check-in	arniml	7459d 07h	/t48/tags/rel_1_0/
46	fix test	arniml	7461d 04h	/t48/tags/rel_1_0/
45	remove unused signals	arniml	7461d 04h	/t48/tags/rel_1_0/
44	default assignment for aux_carry_o	arniml	7461d 05h	/t48/tags/rel_1_0/
43	fix sensitivity list	arniml	7462d 05h	/t48/tags/rel_1_0/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] - Rev 63

Filtering Options