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[/] [t48/] [tags/] [rel_1_0/] [rtl/] - Rev 119

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Rev	Log message	Author	Age	Path
119	add int_in_progress_o to entity of int module	arniml	7340d 23h	/t48/tags/rel_1_0/rtl/
108	Fix for: External Program Memory ignored when EA = 0	arniml	7381d 22h	/t48/tags/rel_1_0/rtl/
107	tie EA to '1'	arniml	7381d 22h	/t48/tags/rel_1_0/rtl/
106	clean-up use of ea_i	arniml	7381d 22h	/t48/tags/rel_1_0/rtl/
101	assert p2_read_p2_o when expander port is read	arniml	7385d 06h	/t48/tags/rel_1_0/rtl/
100	reorder data_o generation	arniml	7385d 06h	/t48/tags/rel_1_0/rtl/
98	Fix bug "ANL and ORL to P1/P2 read port status instead of port output register"	arniml	7385d 06h	/t48/tags/rel_1_0/rtl/
92	work around bug in Quartus II 4.0	arniml	7386d 05h	/t48/tags/rel_1_0/rtl/
91	fix edge detector bug for counter	arniml	7386d 05h	/t48/tags/rel_1_0/rtl/
86	update notice about expander port instructions	arniml	7401d 08h	/t48/tags/rel_1_0/rtl/
78	adjust external timing of BUS	arniml	7407d 04h	/t48/tags/rel_1_0/rtl/
77	move from std_logic_arith to numeric_std	arniml	7407d 20h	/t48/tags/rel_1_0/rtl/
73	removed dummy_s - workaround not longer needed for GHDL 0.11.1	arniml	7408d 09h	/t48/tags/rel_1_0/rtl/
72	removed superfluous signal from sensitivity list	arniml	7408d 09h	/t48/tags/rel_1_0/rtl/
66	add temporary workaround for GHDL 0.11	arniml	7414d 01h	/t48/tags/rel_1_0/rtl/
65	clean up sensitivity list	arniml	7414d 01h	/t48/tags/rel_1_0/rtl/
64	+ enhance instruction strobe generation + rework address output under EA=1 conditions	arniml	7414d 01h	/t48/tags/rel_1_0/rtl/
63	reset machine state to MSTATE3 to allow proper instruction fetch after reset	arniml	7414d 01h	/t48/tags/rel_1_0/rtl/
62	initial check-in	arniml	7414d 01h	/t48/tags/rel_1_0/rtl/
60	+ add marker for injected calls + suppress intstruction strobes for injected calls	arniml	7416d 22h	/t48/tags/rel_1_0/rtl/

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Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] [rtl/] - Rev 119

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