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[/] [t48/] [tags/] [rel_1_0/] [rtl/] [vhdl/] - Rev 176

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Rev	Log message	Author	Age	Path
176	Use en_clk_i instead of xtal3_s for generation of external signals. This is required when the core runs with full xtal clock instead of xtal/3 (xtal_div_3_g = 0).	arniml	6970d 18h	/t48/tags/rel_1_0/rtl/vhdl/
174	fix bug report "MSB of Program Counter changed upon PC increment"	arniml	6971d 21h	/t48/tags/rel_1_0/rtl/vhdl/
172	save data from wishbone bus in register bank with wb_ack necessary to hold data from peripheral/memory until it is read by T48	arniml	7000d 17h	/t48/tags/rel_1_0/rtl/vhdl/
171	remove obsolete output stack_high_o	arniml	7001d 18h	/t48/tags/rel_1_0/rtl/vhdl/
169	initial check-in	arniml	7003d 05h	/t48/tags/rel_1_0/rtl/vhdl/
168	change address range of wb_master	arniml	7003d 05h	/t48/tags/rel_1_0/rtl/vhdl/
167	simplify address range: - configuration range - Wishbone range	arniml	7003d 05h	/t48/tags/rel_1_0/rtl/vhdl/
166	assign default for state_s	arniml	7004d 21h	/t48/tags/rel_1_0/rtl/vhdl/
165	add component wb_master.vhd	arniml	7005d 20h	/t48/tags/rel_1_0/rtl/vhdl/
164	initial check-in	arniml	7005d 20h	/t48/tags/rel_1_0/rtl/vhdl/
162	Fix bug report: "Wrong clock applied to T0" t0_o is generated inside clock_ctrl with a separate flip-flop running with xtal_i	arniml	7006d 20h	/t48/tags/rel_1_0/rtl/vhdl/
161	fix syntax problem that triggers an error with GHDL 0.18	arniml	7038d 00h	/t48/tags/rel_1_0/rtl/vhdl/
157	removed obsolete constant	arniml	7158d 20h	/t48/tags/rel_1_0/rtl/vhdl/
156	added hierarchy t8039_notri	arniml	7158d 20h	/t48/tags/rel_1_0/rtl/vhdl/
155	initial check-in	arniml	7158d 20h	/t48/tags/rel_1_0/rtl/vhdl/
153	introduced generic gate_port_input_g forces masking of P1 and P2 input bus	arniml	7159d 18h	/t48/tags/rel_1_0/rtl/vhdl/
150	intruduced hierarchy t8048_notri where all system functionality except bidirectional ports is handled	arniml	7160d 17h	/t48/tags/rel_1_0/rtl/vhdl/
149	update	arniml	7160d 17h	/t48/tags/rel_1_0/rtl/vhdl/
148	initial check-in	arniml	7160d 17h	/t48/tags/rel_1_0/rtl/vhdl/
145	remove PROG and end of XTAL2, see comment for details	arniml	7197d 19h	/t48/tags/rel_1_0/rtl/vhdl/

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[/] [t48/] [tags/] [rel_1_0/] [rtl/] [vhdl/] - Rev 176

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