OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] [rtl/] [vhdl/] - Rev 73

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
73 removed dummy_s - workaround not longer needed for GHDL 0.11.1 arniml 7382d 07h /t48/tags/rel_1_0/rtl/vhdl/
72 removed superfluous signal from sensitivity list arniml 7382d 07h /t48/tags/rel_1_0/rtl/vhdl/
66 add temporary workaround for GHDL 0.11 arniml 7387d 23h /t48/tags/rel_1_0/rtl/vhdl/
65 clean up sensitivity list arniml 7387d 23h /t48/tags/rel_1_0/rtl/vhdl/
64 + enhance instruction strobe generation
+ rework address output under EA=1 conditions
arniml 7387d 23h /t48/tags/rel_1_0/rtl/vhdl/
63 reset machine state to MSTATE3 to allow proper instruction fetch
after reset
arniml 7387d 23h /t48/tags/rel_1_0/rtl/vhdl/
62 initial check-in arniml 7387d 23h /t48/tags/rel_1_0/rtl/vhdl/
60 + add marker for injected calls
+ suppress intstruction strobes for injected calls
arniml 7390d 20h /t48/tags/rel_1_0/rtl/vhdl/
59 increment prescaler with MSTATE4 arniml 7390d 20h /t48/tags/rel_1_0/rtl/vhdl/
54 - add tb_istrobe_s arniml 7391d 21h /t48/tags/rel_1_0/rtl/vhdl/
53 make istrobe visible through testbench package arniml 7391d 21h /t48/tags/rel_1_0/rtl/vhdl/
45 remove unused signals arniml 7398d 20h /t48/tags/rel_1_0/rtl/vhdl/
44 default assignment for aux_carry_o arniml 7398d 21h /t48/tags/rel_1_0/rtl/vhdl/
43 fix sensitivity list arniml 7399d 22h /t48/tags/rel_1_0/rtl/vhdl/
40 rework adder and force resource sharing between ADD, INC and DEC arniml 7400d 00h /t48/tags/rel_1_0/rtl/vhdl/
38 add measures to implement XCHD arniml 7402d 04h /t48/tags/rel_1_0/rtl/vhdl/
37 add dump_compare support arniml 7402d 04h /t48/tags/rel_1_0/rtl/vhdl/
32 rename pX_limp to pX_low_imp arniml 7407d 22h /t48/tags/rel_1_0/rtl/vhdl/
29 take auxiliary carry from direct ALU connection arniml 7408d 21h /t48/tags/rel_1_0/rtl/vhdl/
28 update wiring for DA support arniml 7408d 21h /t48/tags/rel_1_0/rtl/vhdl/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.