OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] [rtl/] [vhdl/] [system/] - Rev 225

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
225 replaced syn_rom and syn_ram with t48_rom and generic_ram_ena arniml 6620d 11h /t48/tags/rel_1_0/rtl/vhdl/system/
224 initial check-in arniml 6620d 11h /t48/tags/rel_1_0/rtl/vhdl/system/
221 new input xtal_en_i arniml 6621d 11h /t48/tags/rel_1_0/rtl/vhdl/system/
220 new input xtal_en_i arniml 6621d 11h /t48/tags/rel_1_0/rtl/vhdl/system/
216 assign clk_i to outclock arniml 6838d 14h /t48/tags/rel_1_0/rtl/vhdl/system/
213 properly drive P1 and P2 with low impedance markers arniml 6850d 12h /t48/tags/rel_1_0/rtl/vhdl/system/
211 wire signals for P2 low impedance marker issue arniml 6851d 14h /t48/tags/rel_1_0/rtl/vhdl/system/
210 entity changes for P2 low impedance marker issue arniml 6851d 14h /t48/tags/rel_1_0/rtl/vhdl/system/
183 fix missing assignment to outclock arniml 6906d 18h /t48/tags/rel_1_0/rtl/vhdl/system/
180 introduce prefix 't48_' for wb_master entity and configuration arniml 6995d 01h /t48/tags/rel_1_0/rtl/vhdl/system/
172 save data from wishbone bus in register bank with wb_ack
necessary to hold data from peripheral/memory until it is read by T48
arniml 7026d 13h /t48/tags/rel_1_0/rtl/vhdl/system/
169 initial check-in arniml 7029d 01h /t48/tags/rel_1_0/rtl/vhdl/system/
168 change address range of wb_master arniml 7029d 01h /t48/tags/rel_1_0/rtl/vhdl/system/
167 simplify address range:
- configuration range
- Wishbone range
arniml 7029d 01h /t48/tags/rel_1_0/rtl/vhdl/system/
166 assign default for state_s arniml 7030d 17h /t48/tags/rel_1_0/rtl/vhdl/system/
165 add component wb_master.vhd arniml 7031d 16h /t48/tags/rel_1_0/rtl/vhdl/system/
164 initial check-in arniml 7031d 16h /t48/tags/rel_1_0/rtl/vhdl/system/
161 fix syntax problem that triggers an error with GHDL 0.18 arniml 7063d 20h /t48/tags/rel_1_0/rtl/vhdl/system/
157 removed obsolete constant arniml 7184d 16h /t48/tags/rel_1_0/rtl/vhdl/system/
156 added hierarchy t8039_notri arniml 7184d 16h /t48/tags/rel_1_0/rtl/vhdl/system/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.