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[/] [t48/] [tags/] [rel_1_0/] [rtl/] [vhdl/] [system/] - Rev 294

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Rev Log message Author Age Path
292 New directory structure. root 5626d 13h /t48/tags/rel_1_0/rtl/vhdl/system/
277 This commit was manufactured by cvs2svn to create tag 'rel_1_0'. 6438d 23h /t48/tags/rel_1_0/rtl/vhdl/system/
272 fix entity port names arniml 6461d 10h /t48/tags/rel_1_0/rtl/vhdl/system/
271 initial check-in arniml 6461d 10h /t48/tags/rel_1_0/rtl/vhdl/system/
270 fix component name arniml 6461d 11h /t48/tags/rel_1_0/rtl/vhdl/system/
262 name keyword added arniml 6596d 22h /t48/tags/rel_1_0/rtl/vhdl/system/
231 obsoleted by new memory concept arniml 6619d 22h /t48/tags/rel_1_0/rtl/vhdl/system/
226 replaced syn_ram with generic_ram_ena arniml 6619d 22h /t48/tags/rel_1_0/rtl/vhdl/system/
225 replaced syn_rom and syn_ram with t48_rom and generic_ram_ena arniml 6619d 22h /t48/tags/rel_1_0/rtl/vhdl/system/
224 initial check-in arniml 6619d 22h /t48/tags/rel_1_0/rtl/vhdl/system/
221 new input xtal_en_i arniml 6620d 22h /t48/tags/rel_1_0/rtl/vhdl/system/
220 new input xtal_en_i arniml 6620d 22h /t48/tags/rel_1_0/rtl/vhdl/system/
216 assign clk_i to outclock arniml 6838d 02h /t48/tags/rel_1_0/rtl/vhdl/system/
213 properly drive P1 and P2 with low impedance markers arniml 6849d 23h /t48/tags/rel_1_0/rtl/vhdl/system/
211 wire signals for P2 low impedance marker issue arniml 6851d 01h /t48/tags/rel_1_0/rtl/vhdl/system/
210 entity changes for P2 low impedance marker issue arniml 6851d 01h /t48/tags/rel_1_0/rtl/vhdl/system/
183 fix missing assignment to outclock arniml 6906d 05h /t48/tags/rel_1_0/rtl/vhdl/system/
180 introduce prefix 't48_' for wb_master entity and configuration arniml 6994d 13h /t48/tags/rel_1_0/rtl/vhdl/system/
172 save data from wishbone bus in register bank with wb_ack
necessary to hold data from peripheral/memory until it is read by T48
arniml 7026d 00h /t48/tags/rel_1_0/rtl/vhdl/system/
169 initial check-in arniml 7028d 12h /t48/tags/rel_1_0/rtl/vhdl/system/

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