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[/] [t48/] [tags/] [rel_1_0/] [sw/] - Rev 239

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Rev Log message Author Age Path
239 adapt t48 external ROM offset arniml 6609d 00h /t48/tags/rel_1_0/sw/
238 initial check-in arniml 6609d 00h /t48/tags/rel_1_0/sw/
237 initial check-in arniml 6609d 00h /t48/tags/rel_1_0/sw/
236 initial check-in arniml 6609d 01h /t48/tags/rel_1_0/sw/
230 simplify shell command execution arniml 6611d 23h /t48/tags/rel_1_0/sw/
229 rework hex/simulation targets arniml 6611d 23h /t48/tags/rel_1_0/sw/
199 initial check-in arniml 6843d 03h /t48/tags/rel_1_0/sw/
194 initial check-in arniml 6844d 14h /t48/tags/rel_1_0/sw/
185 initial check-in arniml 6898d 03h /t48/tags/rel_1_0/sw/
184 initial check-in arniml 6898d 04h /t48/tags/rel_1_0/sw/
173 testcase for bug report
"MSB of Program Counter changed upon PC increment"
arniml 6989d 05h /t48/tags/rel_1_0/sw/
141 disable external memory to avoid conflicts with outl a, bus arniml 7215d 05h /t48/tags/rel_1_0/sw/
132 stop simulation upon assertion error arniml 7259d 00h /t48/tags/rel_1_0/sw/
131 update arniml 7259d 00h /t48/tags/rel_1_0/sw/
130 initial check-in arniml 7259d 00h /t48/tags/rel_1_0/sw/
127 + log status of A11 properly during interrupt routines
+ trigger counter on negative edge of T1 instead of positive edge
arniml 7328d 12h /t48/tags/rel_1_0/sw/
126 + specify hex file for external ROM on i8039 command line
+ support for no_dump_compare file in test cell
arniml 7328d 12h /t48/tags/rel_1_0/sw/
125 exclude from dump compare arniml 7328d 12h /t48/tags/rel_1_0/sw/
124 fix wrong handling of MB after return from interrupt arniml 7329d 10h /t48/tags/rel_1_0/sw/
123 support hex file for external ROM arniml 7329d 10h /t48/tags/rel_1_0/sw/

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