URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_0/] [sw/] - Rev 266

Rev	Log message	Author	Age	Path
266	cell contains io expander tests	arniml	6557d 22h	/t48/tags/rel_1_0/sw/
265	tagging changed for io expander simulation	arniml	6557d 22h	/t48/tags/rel_1_0/sw/
264	initial check-in	arniml	6557d 22h	/t48/tags/rel_1_0/sw/
246	initial check-in	arniml	6562d 22h	/t48/tags/rel_1_0/sw/
245	initial check-in	arniml	6562d 22h	/t48/tags/rel_1_0/sw/
241	include t8048 and t8039 testbenches	arniml	6580d 20h	/t48/tags/rel_1_0/sw/
239	adapt t48 external ROM offset	arniml	6580d 20h	/t48/tags/rel_1_0/sw/
238	initial check-in	arniml	6580d 21h	/t48/tags/rel_1_0/sw/
237	initial check-in	arniml	6580d 21h	/t48/tags/rel_1_0/sw/
236	initial check-in	arniml	6580d 22h	/t48/tags/rel_1_0/sw/
230	simplify shell command execution	arniml	6583d 20h	/t48/tags/rel_1_0/sw/
229	rework hex/simulation targets	arniml	6583d 20h	/t48/tags/rel_1_0/sw/
199	initial check-in	arniml	6815d 00h	/t48/tags/rel_1_0/sw/
194	initial check-in	arniml	6816d 11h	/t48/tags/rel_1_0/sw/
185	initial check-in	arniml	6870d 00h	/t48/tags/rel_1_0/sw/
184	initial check-in	arniml	6870d 01h	/t48/tags/rel_1_0/sw/
173	testcase for bug report "MSB of Program Counter changed upon PC increment"	arniml	6961d 02h	/t48/tags/rel_1_0/sw/
141	disable external memory to avoid conflicts with outl a, bus	arniml	7187d 02h	/t48/tags/rel_1_0/sw/
132	stop simulation upon assertion error	arniml	7230d 21h	/t48/tags/rel_1_0/sw/
131	update	arniml	7230d 21h	/t48/tags/rel_1_0/sw/