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[/] [t48/] [tags/] [rel_1_1/] - Rev 224

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Rev Log message Author Age Path
224 initial check-in arniml 6597d 13h /t48/tags/rel_1_1/
223 obsoleted arniml 6597d 13h /t48/tags/rel_1_1/
222 add note about clock enable for data memory RAM macro arniml 6598d 13h /t48/tags/rel_1_1/
221 new input xtal_en_i arniml 6598d 13h /t48/tags/rel_1_1/
220 new input xtal_en_i arniml 6598d 13h /t48/tags/rel_1_1/
219 new input xtal_en_i gates xtal_i base clock arniml 6598d 13h /t48/tags/rel_1_1/
218 simplifications arniml 6684d 21h /t48/tags/rel_1_1/
217 update for release 0.6.1 beta arniml 6753d 17h /t48/tags/rel_1_1/
216 assign clk_i to outclock arniml 6815d 17h /t48/tags/rel_1_1/
215 suppress p2_output_pch_o when MOVX operation is accessing the
external memory		 arniml 6815d 17h /t48/tags/rel_1_1/
214 fix sensitivity list arniml 6822d 19h /t48/tags/rel_1_1/
213 properly drive P1 and P2 with low impedance markers arniml 6827d 14h /t48/tags/rel_1_1/
212 add bug reports
"Problem when INT and JMP"
"P2 Port value restored after expander access"		 arniml 6827d 17h /t48/tags/rel_1_1/
211 wire signals for P2 low impedance marker issue arniml 6828d 16h /t48/tags/rel_1_1/
210 entity changes for P2 low impedance marker issue arniml 6828d 16h /t48/tags/rel_1_1/
209 entity changes for P2 low impedance issue arniml 6828d 16h /t48/tags/rel_1_1/
208 wire signals for P2 low impeddance marker issue arniml 6828d 16h /t48/tags/rel_1_1/
207 entity changes for P2 low impedance trigger issue arniml 6828d 16h /t48/tags/rel_1_1/
206 * change low impedance markers for P2
separate marker for low and high part
* p2_o output is also registered to prevent combinational
output to pads		 arniml 6828d 17h /t48/tags/rel_1_1/
205 operate ale_q and int_q with xtal_i after shift of ALE assertion to XTAL3 arniml 6828d 17h /t48/tags/rel_1_1/

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