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[/] [t48/] [tags/] [rel_1_1/] [bench/] - Rev 302

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Rev	Log message	Author	Age	Path
292	New directory structure.	root	5601d 14h	/t48/tags/rel_1_1/bench/
289	This commit was manufactured by cvs2svn to create tag 'rel_1_1'.		5915d 01h	/t48/tags/rel_1_1/bench/
282	decouple bidir port T0 from P1 fixes testcase black_box/tx/t0	arniml	5917d 02h	/t48/tags/rel_1_1/bench/
248	initial check-in	arniml	6571d 23h	/t48/tags/rel_1_1/bench/
247	initial check-in	arniml	6572d 01h	/t48/tags/rel_1_1/bench/
240	comment added about lower 1k of external ROM	arniml	6591d 23h	/t48/tags/rel_1_1/bench/
234	cleanup & enhance external access	arniml	6594d 00h	/t48/tags/rel_1_1/bench/
233	added external ROM	arniml	6594d 00h	/t48/tags/rel_1_1/bench/
228	replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom/t3x_rom	arniml	6594d 23h	/t48/tags/rel_1_1/bench/
224	initial check-in	arniml	6594d 23h	/t48/tags/rel_1_1/bench/
220	new input xtal_en_i	arniml	6595d 23h	/t48/tags/rel_1_1/bench/
202	fix address assignment	arniml	6826d 03h	/t48/tags/rel_1_1/bench/
201	split low impedance markers for P2	arniml	6826d 03h	/t48/tags/rel_1_1/bench/
200	add check for tCP: Port Control Setup to PROG'	arniml	6826d 03h	/t48/tags/rel_1_1/bench/
183	fix missing assignment to outclock	arniml	6881d 06h	/t48/tags/rel_1_1/bench/
160	add others to case statement	arniml	7159d 04h	/t48/tags/rel_1_1/bench/
140	remove tAW sanity check conflicts with OUTL A, BUS	arniml	7198d 04h	/t48/tags/rel_1_1/bench/
133	add checks for PSEN	arniml	7241d 23h	/t48/tags/rel_1_1/bench/
111	split 4k internal ROM into + 2k internal ROM + 2k external ROM EA of t48_core is driven by MSB of internal ROM address if upper 2k block is selected, the system switches to EA mode on the fly	arniml	7355d 12h	/t48/tags/rel_1_1/bench/
110	exchange syn_rom for lpm_rom	arniml	7355d 13h	/t48/tags/rel_1_1/bench/

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Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_1/] [bench/] - Rev 302

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