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[/] [t48/] [tags/] [rel_1_1/] [rtl/] - Rev 344

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Rev	Log message	Author	Age	Path
292	New directory structure.	root	5563d 07h	/t48/tags/rel_1_1/rtl/
289	This commit was manufactured by cvs2svn to create tag 'rel_1_1'.		5876d 18h	/t48/tags/rel_1_1/rtl/
284	better support for ISE/XST: opc_table and opc_decoder merged into decoder_pack and decoder	arniml	5877d 20h	/t48/tags/rel_1_1/rtl/
275	fix sensitivity list	arniml	6376d 16h	/t48/tags/rel_1_1/rtl/
273	reset counter_q	arniml	6394d 02h	/t48/tags/rel_1_1/rtl/
272	fix entity port names	arniml	6398d 04h	/t48/tags/rel_1_1/rtl/
271	initial check-in	arniml	6398d 04h	/t48/tags/rel_1_1/rtl/
270	fix component name	arniml	6398d 05h	/t48/tags/rel_1_1/rtl/
262	name keyword added	arniml	6533d 16h	/t48/tags/rel_1_1/rtl/
261	* name tag added * restriction concerning expander port removed	arniml	6533d 16h	/t48/tags/rel_1_1/rtl/
249	Fix bug report "Deassertion of PROG too early" PROG is deasserted at end of XTAL3 now	arniml	6533d 16h	/t48/tags/rel_1_1/rtl/
247	initial check-in	arniml	6533d 18h	/t48/tags/rel_1_1/rtl/
231	obsoleted by new memory concept	arniml	6556d 16h	/t48/tags/rel_1_1/rtl/
227	replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom	arniml	6556d 16h	/t48/tags/rel_1_1/rtl/
226	replaced syn_ram with generic_ram_ena	arniml	6556d 16h	/t48/tags/rel_1_1/rtl/
225	replaced syn_rom and syn_ram with t48_rom and generic_ram_ena	arniml	6556d 16h	/t48/tags/rel_1_1/rtl/
224	initial check-in	arniml	6556d 16h	/t48/tags/rel_1_1/rtl/
222	add note about clock enable for data memory RAM macro	arniml	6557d 16h	/t48/tags/rel_1_1/rtl/
221	new input xtal_en_i	arniml	6557d 16h	/t48/tags/rel_1_1/rtl/
220	new input xtal_en_i	arniml	6557d 16h	/t48/tags/rel_1_1/rtl/

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[/] [t48/] [tags/] [rel_1_1/] [rtl/] - Rev 344

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